 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| YMU757B MA-1C Outline The YMU75B is a high quality melody LSI for cellular phone handsets, supporting the data format for various applications including ringing and holding melody sounds. The built-in Yamaha's original FM synthesizer can create various timbres, and its built-in sequencer can produce up to 4 different sounds with 4 different timbres simultaneously without placing a load to the controller. The serial port controller interface enables real time reproduction of the melody data via FIFO, without the limitation of the data capacity. With a built-in amplifier to drive the dynamic type speaker, it is possible to connect the speaker directly. This LSI also has an analog-output terminal for the phone jack. In the stand-by mode, the power consumption can be reduced to 1 A or less while waiting. Features YAMAHA's original FM sound generator function Built-in sequencer Capable of producing up to 4 different sounds simultaneously (4 independent timbres available). Built-in output 400mW speaker amplifier Built-in circuit for sound quality correcting equalizer Built-in serial interface 2.688, 8.4, 12.6, 14.4, 19.2, 19.68, 19.8 and 27.82 MHz serial clock inputs support And support the mode which set to optional frequency from 2.685MHz to 27.853MHz at 55.93kHz intervals Analog output for ear phone Power down mode (Typ 1A or less) Power supply voltage (Digital and Analog): 3.0V10 % 20-pin QFN YAMAHA CORPORATION YMU757B CATALOG CATALOG No.:LSI-4MU757B2 2000.4 YMU757B Contents * General description of YMU757B.........................................................................3 * Block description............................................................................................4 * Pin configuration............................................................................................5 * Pin description..............................................................................................6 * Block diagram...............................................................................................7 * Register map.................................................................................................8 * Explanation of registers.....................................................................................9-20 Musical score data.................................................................................9-13 Timbre data........................................................................................14-17 Other control data.................................................................................17-20 * Power-down control division diagram.....................................................................21 * Explanation of each bit......................................................................................21-23 * Resetting.........................................................................................................24 * Settings & procedure required to generate melody.........................................................24 * Settings of clock frequency....................................................................................24 * Interrupt sequence............................................................................................25 * State transition description...................................................................................26-27 * Operation in FIFO empty state..............................................................................28 * Reproduction method assuming occurrence of empty state................................................28 * Example of system connection..............................................................................29 * One sound and volume level adjustment in 4 sound pronunciation........................................30-31 * Sound quality correction circuit............................................................................32-33 * Serial interface specifications...............................................................................34 * Electrical characteristics.....................................................................................35-40 * General description of FM sound generator................................................................41 * External dimensions.........................................................................................42 -2- YMU757B General description of YMU757B The YMU757B is controlled by way of the serial interface. Shown below is its internal configuration. Volume, power management, etc. SDIN SYNC SCLK Serial interface Timbre Data Timbre register Musical score data Tempo START/STOP Timbre allotment HPOUT /IRQ FIFO 32word Sequencer FM Synthesizer D/A + Volume AMP SPOUT When the data is inputted into the serial interface, it is converted into the parallel data and transmitted to each function block according to the index address. The musical score data is stored in the 32-word FIFO first and then transmitted to the sequencer where it is interpreted and signals to control sound generation of the FM synthesizer is output. The timbre register is where up to 8 timber data can be stored. Also, as the sequencer controlling parameters, the start/stop and tempo signals are provided. In order to have sound generated, the following processes must be performed for this LSI. 1) Initial status setting (cancellation of power-down function, clock selection, etc.) 2) Timbre data setting 3) Writing the musical score data in FIFO before starting the sequence 4) Writing the next musical score data before FIFO becomes empty upon receipt of the interrupt signal from FIFO during reproduction,. (For the details, refer to "Settings & procedure required to generate melody".) -3- YMU757B Block description 1) Serial interface When the serial interface receives the serial data, it identifies the index data and transmits the control data to each function block. 2) FIFO The musical score data are stored temporarily in FIFO which can contain up to 32 musical score data. The musical score data are processed are processed in the sequencer when they are generated as sounds and those that have been processed are deleted one after another. When the remaining data amount in FIFO reaches the register setting (IRQ point) or less, it outputs an interrupt signal to ask for the continuing musical score data to be fed. 3) Sequencer When the sequencer receives the START command, it starts to read the musical score data which have been stored in FIFO. The processed musical score data are deleted. 4) Timbre register (Index 10h~2Fh) The timbre data are stored in this register which can contain up to 8 timbres. Settings for this register must be made before sound generation. Though it is initialized by hardware resetting, contents of a register aren't cleared, and the value which had light last time is held as for the following. * Software reset (CLR bit of Index32h) * After the inside of the power going down mode and a release. 5) FM synthesizer The timbres are synthesized and generated according to settings. Four sounds can be generated at the same time. 6) D/A, volume and amplifier The outputs from the synthesizer are D/A converted and volume processed. After that, they are output from the speaker or the earphone out terminal. -4- YMU757B Pin configuration SPOUT2 SPOUT1 DVDD DVSS 15 14 13 12 11 /TESTI /RST TESTO CLK_I SDIN 16 17 18 19 20 1 SYNC 2 SCLK 3 AVSS 4 VREF 5 HPOUT 10 9 8 7 6 SPVSS AVDD EQ3 EQ2 EQ1 20 Pin QFN Top View /IRQ -5- YMU757B Pin description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin SYNC SCLK AVSS VREF HPOUT EQ1 EQ2 EQ3 AVDD SPVSS SPOUT1 SPOUT2 DVSS DVDD /IRQ /TESTI /RST TESTO CLK_I SDIN I/O I Ish A AO AO AI AO AO AO O I I O Ish I Function Serial I/F synchronous signal input Serial I/F bit clock input Analog ground Analog reference voltage terminal Connect 0.1F capacitor between this terminal and the analog ground terminal. Analog output terminal for ear phone Equalizer terminal 1 Equalizer terminal 2 Equalizer terminal 3 Analog power supply (+3.0V) Connect 0.1F and 4.7F capacitors between this terminal and the analog ground terminal Analog ground exclusively used for speaker Speaker output terminal 1 Speaker output terminal 2 Digital ground Digital power supply (+3.0V) Connect 0.1F and 4.7F capacitors between this terminal and the digital ground terminal. Interrupt signal output LSI test input terminal (Always connect with DVDD.) Hardware reset terminal LSI TEST output terminal (disconnected) Clock input terminal Serial I/F data input Note : Ish = Schmitt input terminal AI = Analog input terminal A0 = Analog output terminal -6- YMU757B Block diagram CLK_I HPOU DVDD AVDD DVSS Timing Generator Power down Control AIN * FMVOL 32step HPVOL 32step SCLK SYNC SDIN AVSS EQ1 CR circuit EQ Register Serial FIFO 16b x 32w Sequencer FM Synthesizer 4Sound signals generated simultaneously DAC VREF + EQ2 I/F EQ3 /IRQ VREF SPVOL 32step SPOUT AMP SPOUT /RST VREF SPVSS Concerning AIN signal inputted into equalizer circuit As this design presupposes the use of this LSI for the "hands-free", it is possible to process the FM sound and call sound by analog mixing in the equalizer circuit and output the resulting sound through the speaker. -7- YMU757B Register map Index $00h b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 TI3 TI3 b5 TI2 TI2 b4 TI1 TI1 b3 TI0 b2 b1 b0 Description Note data Rest data Timbre data (Left data for 1 timbre) Timbre allotment data BL1 BL0 NT3 NT2 NT1 NT0 CH1 CH0 VIB 0 0 1 1 0 0 CH1 CH0 VCHE TK2 TK1 TK0 TI0 VCH2 VCH1 VCH0 $10 - 2Fh ML2 ML1 ML0 VIB EGT SUS RR3 RR2 RR1 RR0 DR3 DR2 DR1 DR0 AR3 AR2 AR1 AR0 SL3 SL2 SL1 SL0 TL5 TL4 TL3 TL2 TL1 TL0 WAV FL2 FL1 FL0 $30h $31h $32h $33h $34h $35h $36h $37h $38h $39h $40 - EFh $F0 - FFh 0 0 0 0 0 0 0 0 0 0 V32 V31 V30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 V22 V21 V20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T7 0 0 0 0 0 0 0 V12 V11 V10 T6 0 0 0 0 0 0 0 T5 0 0 IRQE 0 T3 0 0 V02 V01 V00 T2 0 T1 CLR CLKSEL IRQ Point T0 ST T4 0 0 Tempo data FM Control CLK_I select IRQ Control 0 0 0 0 V4 V4 V4 V3 V3 V3 V2 V2 V2 V1 V1 V1 V0 V0 V0 DP Speaker Volume FM Volume HPOUT Volume Power Management CLK_I Select Reserved LSI TEST AP4 AP3 AP2 AP1 CLKSET Reserved (access prohibited) For LSI TEST(access prohibited) Note : Making an access to the spaces marked "Reserved" and "For LSI TEST" in the above table is prohibited. Be sure to write "0" for the empty bit, although writing "1" there will not affect the LSI operation. -8- YMU757B Explanation of registers The YMU757B has three types of control registers. They are musical score data, timbre data and other control data. Musical score data $00h Musical score data The musical score data are written in FIFO whose capacity is 32 words. There are two types of musical score data; note data and rest data. Note data Index $00h Default: 0000h B15 BL1 b14 BL0 b13 NT3 b12 NT2 b11 NT1 b10 NT0 b9 CH1 b8 CH0 b7 VIB b6 TI3 b5 TI2 b4 TI1 b3 TI0 b2 TK2 b1 TK1 b0 TK0 BL1 - BL0 : Octave block setting Three octave blocks are available for sound range setting. The setting range is 1 to 3. Do not use "0" for setting. The sound generation range involves the coefficient named "Multiple (multiplying factor for sound frequency). By combining the octave block and Multiple settings, sounds can be generated in the ranges as listed in the table blow. Since the setting ranges of "Multiple" coefficient is 0 to 7, actually, sounds can be generated in a wider ranges than those given in the table below. Multiple = 1 (x1) BL[1:0] = 01b C#3 D3 D#3 E3 F3 F#3 G3 G#3 A3 A#3 B3 C4 C#4 D4 D#4 E4 F4 F#4 G4 G#4 A4 A#4 B4 C5 C#5 D5 D#5 E5 F5 F#5 G5 (139Hz) (147Hz) (156Hz) (165Hz) (175Hz) (185Hz) (196Hz) (208Hz) (220Hz) (233Hz) (247Hz) (262Hz) (277Hz) (294Hz) (311Hz) (330Hz) (349Hz) (370Hz) (392Hz) (415Hz) (440Hz) (466Hz) (494Hz) (523Hz) (554Hz) (587Hz) (622Hz) (659Hz) (698Hz) (740Hz) (784Hz) Multiple = 2 (x2) C#4 D4 D#4 E4 F4 F#4 G4 G#4 A4 A#4 B4 C5 C#5 D5 D#5 E5 F5 F#5 G5 G#5 A5 A#5 B5 C6 C#6 D6 D#6 E6 F6 F#6 G6 (277Hz) (294Hz) (311Hz) (330Hz) (349Hz) (370Hz) (392Hz) (415Hz) (440Hz) (466Hz) (494Hz) (523Hz) (554Hz) (587Hz) (622Hz) (659Hz) (698Hz) (740Hz) (784Hz) (831Hz) (880Hz) (932Hz) (988Hz) (1046Hz) (1109Hz) (1175Hz) (1245Hz) (1319Hz) (1397Hz) (1480Hz) (1568Hz) Multiple = 4 (x4) C#5 D5 D#5 E5 F5 F#5 G5 G#5 A5 A#5 B5 C6 C#6 D6 D#6 E6 F6 F#6 G6 G#6 A6 A#6 B6 C7 C#7 D7 D#7 E7 F7 F#7 G7 (554Hz) (587Hz) (622Hz) (659Hz) (698Hz) (740Hz) (784Hz) (831Hz) (880Hz) (932Hz) (988Hz) (1046Hz) (1109Hz) (1175Hz) (1245Hz) (1319Hz) (1397Hz) (1480Hz) (1568Hz) (1661Hz) (1760Hz) (1865Hz) (1976Hz) (2093Hz) (2217Hz) (2349Hz) (2489Hz) (2637Hz) (2794Hz) (2960Hz) (3136Hz) BL[1:0] = 10b BL[1:0] = 11b -9- YMU757B G#5 A5 A#5 B5 C6 (831Hz) (880Hz) (932Hz) (988Hz) (1046Hz) G#6 A6 A#6 B6 C7 (1661Hz) (1760Hz) (1865Hz) (1976Hz) (2093Hz) G#7 A7 A#7 B7 C8 (3322Hz) (3520Hz) (3729Hz) (3951Hz) (4186Hz) NT3 - NT0 : Pitch setting Four bits from NT3 to 0 are used to specify the pitch. The bit assignment is as shown below. NT[3:0] 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Ah Bh Ch Dh Eh Fh Pitch Prohibition C# D D# Prohibition E F F# Prohibition G G# A Prohibition A# B C About "prohibition of a setup" Though LSI never hangs up, different sound may be made. Never set it up. CH1 - CH0 : Part setting As the sound generator can generate sounds in 4 parts simultaneously, set the part for each note by using CH1 and 0 bits. CH[1:0] 00b 01b 10b 11b Part 0 1 2 3 VIB : Vibrato setting This bit is used to set Vibrato function on or off for each note : "0" to set it off and "1" to set it on. The vibrato frequency is 6.4Hz and the modulation rate is 13.47 cent. When VIB bit of timbre data($10-2Fh) is "0", Vibrato function off. -10- YMU757B TI3 - TI0 : Interval setting These bits are used to set the interval period before the note and rest are processed next. The interval "48" represents the time for the whole note. TI [3:0] 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Ah Bh Ch Dh Eh Fh Interval 0 2 3 4 6 8 9 12 18 24 48 0 16 24 36 48 TK2 - 0 : Note (sound length) designation These 3 bits are used to designate the note (sound length). Depending on the values of interval setting (TI3 - 0), the length varies as shown in the following table. The interval "48" represents the time for the whole note. TI [3:0] = 0-Ah TK[2:0] Sound length TI [3:0] = B-Fh 5 8 6 11 7 17 0 15 1 23 2 29 3 32 4 35 5 41 6 47 7 Tie, Slur 0 1 1 2 2 3 3 5 4 7 -11- YMU757B Precaution When KEY is turned on from the condition that a release rate isn't finished completely again in the same one channel, a tone may change. This happens in the case of the continuous sound, even the decline sound which. A reason happens because envelope of the career side of a source of FM sound and modulator side and a phase deviate. The hardware creating the phase of a source of FM sound and envelope starts a movement by the following two conditions. - A release rate is finished. - Key ON occurs. Tone data start a movement at the timing which modulator, a phase between the career, envelope are the same as. It is being based on what is done. When this condition isn't satisfied, a change in a tone occurs. It explains by the following envelope figure. It thinks that there is a tone which only release time is different from with the career and modulator as an example. As for the condition that it stops completely, it moves to attack rate at the same time with KEY on. If the last pronunciation is not the condition which stops completely while it is released, the setup of a release is made early forcibly, and it moves from the condition that (8.94mS) stops to attack rate. (In the figure, the dotted line of A) Though envelope of the solid line changes to attack rate soon at the time of second KEY ON, because sound of the dotted line doesn't stop completely, envelope can't move to attack rate soon. It moves to attack rate after it becomes the condition that release time is made early and it stops completely. When both envelope and the start of the phase deviate and a tone varies according to the deviation of this time. Both envelope and the start of the phase deviate, and a tone changes by the deviation of this time. A tone changes. A TK TI How to avoid this symptom. Try to pronounce it under the condition that a release stops completely. TK -12- YMU757B Rest data Index $00h b15 0 Default: 0000h b14 0 B13 1 b12 1 b11 0 b10 0 b9 CH1 b8 CH0 b7 VCHE b6 TI3 b5 TI2 b4 TI1 b3 TI0 b2 VCH2 b1 VCH1 b0 VCH0 CH1 - CH0 : Part setting Using CH1 or 0 bit, set the part for each rest. CH[1:0] 00b 01b 10b 11b Part 0 1 2 3 TI3 - TI0 : Interval setting These bits are used to set the interval before the note and rest are processed next. The interval "48" represents the time for the whole note. The following table is exactly the same as that for the note data. TI [3:0] 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Ah Bh Ch Dh Eh Fh Interval 3 2 3 4 6 8 9 12 18 24 48 1 16 24 36 48 VCHE, VCH 2 - 0 : Timbre change function Although the maximum number of timbres that can be used simultaneously is four, the timbre can be changed during sound reproduction by setting these bits. Set "1" for VCHE and use VCH2 to VCH0 to set the timbre No.. Then starting with the note whose sound is to be generated next, the timbre for the part which has been set by using CH0 and 1 will be changed. Change a tone after the pronunciation of a part to change stops completely. The condition that pronunciation stops is not the condition that TK (pronunciation length) is finished, but the condition that the time when releases of envelope is finished. Be careful because strange sound momentarily is pronounced when you change a tone under the condition that pronunciation doesn't stop completely. If the timbre allotment is changed by using this function, the $30h register itself will be rewritten. -13- YMU757B Timbre data $10 - 2Fh Timbre data It is possible to register the data for 8 timbres in the register and 4 among them can be reproduced simultane ously. One timbre consists of [parameter for the modulator] and [parameter for the carrier] as a set. (For the details of the modulator and the carrier, please refer to "General description of FM sound generator"). Index 10h, 11h ...... Timbre data for the 1st timbre modulator Index 12h, 13h ...... Timbre data for the 1st timbre carrier Index 14h, 15h ...... Timbre data for the 2nd modulator Index 16h, 17h ...... Timbre data for the 2nd timbre carrier ...............Omitted................ Index 2Ch, 2Dh ...... Timbre data for the 8th timbre modulator Index 2Eh, 2Fh ...... Timbre data for the 8th timbre carrier The following bit assignment is used for both modulator and carrier. The setting must be completed before any sound is generated. It is prohibited to change the timbre parameter while any sound is generated. Timbre data Index EVEN B15 ML2 Default: 0000h b14 ML1 b13 ML0 b12 VIB B11 EGT b10 SUS B9 RR3 b8 RR2 b7 RR1 b6 RR0 b5 DR3 b4 DR2 b3 DR1 b2 DR0 b1 AR3 b0 AR2 ODD AR1 AR0 SL3 SL2 SL1 SL0 TL5 TL4 TL3 TL2 TL1 TL0 WAV FL2 FL1 FL0 ML2 - ML0 : Multiple setting "Multiple" refers to the multiplying factor for sound frequency. The output frequency is determined by the octave, pitch and multiple settings on the carrier side. On the modulator side, it is possible to adjust the multiple setting and create different timbres. ML [2:0] Multiplying factor for frequency 0h 1h 2h 3h 4h 5h 6h 7h X X X X X X X X 1/2 1 2 3 4 5 6 7 -14- YMU757B VIB : Vibrato This function is used for setting the vibrato function on or off. Use "0" to set it off and "1" to set it on. The vibrato frequency is 6.4Hz and the modulation rate is 13.47cent. EGT : Envelope waveform type This function is used to select the type of the envelope waveform. Use "0" for the damped sound and "1" for the sustained sound. Shown below are the waveforms for the damped sound and sustained sound. EGT=0 Damped sound DR 0dB AR RR SL When SUS=ON -48dB Sound length EGT=1 Sustained sound DR 0dB AR SL RR When SUS=ON -48dB Sound length AR3 - AR0 : Attack rate setting "Attack rate" refers to the time from start of the sound generation (-48dB) until it reaches the maximum volume (0dB). The table on page 15 shows the settings by the time required to reach 0dB from -48dB. DR3 - DR0 : Decay rate setting The decay rate refers to the damping time required to reach the sustain level (SL) from the maximum volume level (0dB). The table below shows the settings by the time required to reach -48dB from 0dB. RR3 - RR0 : Release rate setting The release rate is defined differently for the damped sound and the sustained sound. * In the case of the damped sound, it means the damping time from the sustain level to the end of the sound length. The sound is damped in 286ms (time to reach -48dB from 0dB) after the end of the sound length is reached. * In the case of the sustained sound, it means the damping time from the end of the sound length. -15- YMU757B SL3 - SL0 : Sustain level setting The sustain level refers to the level at which shifting from the decay rate to the release rate takes place in the case of the damped sound, and the volume level of the sound being sustained in the case of the sustained sound. SL -> Weighted bit (dB) SL3 -24 SL2 -12 SL1 -6 SL0 -3 AR[3:0] DR[3:0] RR[3:0] Fh Eh Dh Ch Bh Ah 9h 8h 7h 6h 5h 4h 3h 2h 1h 0h Attack rate From -48 to 0dB (ms) 0 4.65 9.30 18.59 37.19 74.38 148.76 297.51 595.03 1190.05 2380.10 4760.21 9520.42 19040.84 Decay rate, release rate from 0 to -48dB (ms) 2.23 8.94 17.88 35.76 71.52 143.04 286.07 572.14 1144.25 2288.56 4577.12 9154.25 18308.50 36617.00 TL5 - TL0 : Total level setting This function is used to set the envelope level. TL Weighted bit (dB) TL5 -24 TL4 -12 TL3 -6 TL2 -3 TL1 -1.5 TL0 -0.75 SUS : Sustain On/OFF setting "0" : OFF "1" : ON The release rate changes to "6" (2.29s) when the sound length comes to the end. WAV : Waveform selection The modulator and carrier can generate the SIN wave but when this bit setting is made, it is possible to generate a half-wave rectified waveform of the SIN wave, the timbres in wider range can be created. "0" : SIN wave "1" : Half-wave rectified waveform of the SIN wave. WAV=0 WAV=1 FL2 - FL0 : Feed-back setting This function is effective for the operator on the carrier side only. It is used to set the feedback modulation rate. Be sure to set "0" for the operator on the modulator side. This is effective when generating the strings. -16- YMU757B FL [2:0] Modulation rate 0 0 1 /16 2 / 8 3 / 4 4 / 2 5 6 2 7 4 Other control data $30h Timbre allotment data One melody consists of four parts and a timbre is allotted for each of these parts. Among the eight timbres registered in the timbre data register, use four of them for each of these parts. Default: 0000h Index $30h b15 0 b14 V32 b13 V31 b12 V30 b11 0 b10 V22 b9 V21 b8 V20 b7 0 b6 V12 b5 V11 b4 V10 b3 0 b2 V02 b1 V01 b0 V00 "x" in Vx[2:0] means the part No. The timbre data used with Vx[2:0] are as follows. Vx[2:0] 0h 1h 2h 3h 4h 5h 6h 7h Timbre data to be used Timbre set for index 10 to 13h is used. Timbre set for index 14 to 17h is used. Timbre set for index 18 to 1Bh is used. Timbre set for index 1C to 1Fh is used. Timbre set for index 20 to 23h is used. Timbre set for index 24 to 27h is used. Timbre set for index 28 to 2Bh is used. Timbre set for index 2C to 2Fh is used. $31h Tempo data The "tempo" refers to the number of quarter notes reproduced in one minute. Use this setting to set the tempo of the melody used when reproduced. The setting data is (8739/TEMPO)-1 Default: 0000h Index $31h b15 0 b14 0 b13 0 b12 0 b11 0 b10 0 b9 0 b8 0 b7 T7 b6 T6 b5 T5 b4 T4 b3 T3 b2 T2 b1 T1 b0 T0 $32h FM section control Default: 0000h Index $32h b15 0 b14 0 b13 0 b12 0 b11 0 b10 0 b9 0 b8 0 b7 0 b6 0 b5 0 b4 0 b3 0 b2 0 b1 CLR b0 ST ST : This bit is used to control start/stop of the melody. Use "1" for the start setting and "0" for the stop setting. CLR : This bit is used to initialize the entire LSI by the software. All the one except for " Timbre data register" of Index10~2Fh are initialized. Bit CLR itself is not cleared when it is set as "1". Bit CLR should be written "0". -17- YMU757B $33h Clock selection Default: 0000h Index $33h b15 0 b14 0 b13 0 b12 0 b11 0 b10 0 b9 0 b8 0 b7 0 b6 0 b5 0 b4 0 b3 0 b2 b1 CLKSEL b0 This setting sets the clock frequency inputted through the CLK_I terminal. Be sure to execute this setting before reproducing the melody. Even if clock of which frequency is being inputted during resetting, it is OK. (As for the details of the establishment of clock, see on "about establishment of clock frequency".) CKSEL [2:0] 0h(*) 1h 2h 3h 4h 5h 6h Clock frequency (MHz) 2.688 19.200 19.680 19.800 8.400 14.400 27.821 7h 12.600 (*)When clock is set by programmable mode, set CLKSEL[2:0] to "0h". $34h Interrupt control Default: 0000h Index b15 0 b14 0 b13 0 b12 0 b11 0 b10 0 b9 0 b8 0 b7 0 b6 0 b5 IRQE b4 b3 IRQ b2 point b1 b0 $34h The musical score data is taken into FIFO which has a capacity for 32 data. As the sounds are reproduced, the data in FIFO are processed and deleted. When the amount of data remaining in FIFO becomes less than the IRQ point set value, an interrupt signal is generated. At this point, set "0" for IRQE and write the continuing musical score data into FIFO. Make sure that the written data exceeds the IRQ point. After writing the data, reset "1" for IRQE and wait until another interrupt signal is generated. IRQpoint can set 32 ways from 0 (empty) to 31 (1 data vacancy). IRQE is enable bit. Set "1" for enable. $35h $36h $37h Speaker volume control FM volume control Ear phone output volume control -18- YMU757B Default: 0000h Index $35-7h b15 0 b14 0 b13 0 b12 0 b11 0 b10 0 b9 0 b8 0 b7 0 b6 0 b5 0 b4 V4 b3 V3 b2 V2 b1 V1 b0 V0 These bits are used to set the volume of each source. The volume setting consists of 31 steps and mute function. It is possible to set at 1dB intervals. As the default is muted, cancel the mute function before proceeding to sound generation. Also, to reduce the power, be sure to mute the volume subject to power reduction before shifting. Relations of register setting value and volume. V[4:0] 00h 01h 02h 03h 04h 05h 06h 07h Volume(dB) MUTE -30 -29 -28 -27 -26 -25 -24 V[4:0] 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh Volume(dB) -23 -22 -21 -20 -19 -18 -17 -16 V[4:0] 10h 11h 12h 13h 14h 15h 16h 17h Volume(dB) -15 -14 -13 -12 -11 -10 -9 -8 V[4:0] 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh Volume(dB) -7 -6 -5 -4 -3 -2 -1 0 $38h Power Management control Default: 001Eh Index $38h b15 0 b14 0 b13 0 b12 0 b11 0 B10 0 b9 0 b8 0 b7 0 b6 0 b5 0 b4 AP4 b3 AP3 b2 AP2 b1 AP1 b0 DP This setting is used to reduce the power of each function. It is possible to control 1 digital system and 4 analog systems independently. (For the details, please refer to "Power-down control division diagram".) Setting all bits to "1" will minimize the power of the entire LSI. DP : Use of "1" for this setting will reduce the power of the entire digital section. AP1 : Use of "1" for this setting will reduce the power of the VREF circuit in the analog section. AP2 : Use of "1" for this setting will reduce the power on the non-inverted amplifier side of the FM volume, speaker volume, equalizer circuit and speaker output section. AP3 : Use of "1" for this setting will reduce the power of the inverted amplifier side of the speaker output section. AP4 : Use of "1" for this setting will reduce the power of the DAC and ear phone output volume. After initialization, the power of the analog section (AP1 to AP4) is reduced. -19- YMU757B $39h Clock setting Default: 0000h Index $39h b15 0 b14 0 b13 0 b12 0 b11 0 b10 0 b9 0 b8 b7 b6 b5 b4 CLKSET b3 b2 b1 b0 When clock is set in programmable mode, the frequency of clock which it is inputted from the CLK_I terminal is set. Complete establishment before pronounce. Even if clock of which frequency is being inputted during resetting, it is OK. As for the details of the establishment of clock, which see "about establishment of clock frequency". CLKSET [8:0] 000000000b 000000001b : 000101111b 000110000b 000110001b : 111110001b 111110010b 111110011b : 111111111b Clock frequency(MHz) (Preset mode) Prohibition : Prohibition 2.684658000 2.740588375 : 27.797396375 27.853326750 Prohibition : Prohibition The value can be set to CLKSET are "000000000b", from "000110000b" to "111110010b". If set value except for it, movement of LSI isn't guaranteed. Value to establish in CLKSET can be found by using the following ceremony. CLKSET = Clock frequency[KHz] / 447.443 * 8 For example, when clock frequency is 3MHz, it becomes the following. CLKSET = 3000 / 447.443 * 8 is about 54 = 000110110b And, clock frequency is as follows. Clock frequency[kHz] = 54 * 447.443 / 8 = 3020.24[kHz] = 3.02024[MHz] -20- YMU757B Power-down control division diagram As for the power-down, it is possible to divide an inside function separately and to control it. The power-down is controlled by Index 38h. Controlled by using DP bit HPOUT Controlled by using AP4 bit Controlled by using AP2 bit DVDD CLK_I DVSS AVDD VOL 32step Timing Generator Power down Control VOL 32step SCLK SYNC SDIN AVSS EQ1 EQ2 EQ3 SPOUT SPOUT Controlled by using AP3 bit Register RAM Serial I/F FIFO 16b x 32w FM Synthesizer 4 sounds generated simultaneously DAC EQ VOL 32step /IRQ AMP VREF /RST VREF Controlled by using AP1 bit SPVSS Explanation of each bit DP It is the bit to make the power-down whole of the digital department. Because clock to move inside stops consumption electric current of the digital part can be restrained in minimum. Data on FIFO are cleared though contents of a register are held. AP1 It is the bit that the power-down a VREF circuit decline. If AP1 is set to "1", the whole of the analog part stops. Because an analog center voltage is made by VREF circuit. AP2 It is the bit to make power-down FM volume part, EQ circuit, speaker volume, and non-reversal amplifier side of speaker output part. -21- YMU757B AP3 It is the bit that the power-down the reversal amplifier side of the speaker output part decline. A reversal amplifier side is started after a VREF circuit and a non-reversal amplifier are started. And, it depends, and pop noise occurrence can be restrained. AP4 It is the bit that power-down DAC and the HP Volume part. The attention point when the power-down moves. Move from the condition that pronunciation surely stops for the power-down. It is possible that the power-down a digital and an analog decline at the same time. Be sure to mute FM Volume and HP Volume. It is to restrain the noise when power going down. The register which a digital part can't access during the power going down is as the following. Index $00h $10-2Fh $30h $31h $34h Register functions Note data Tone data Timbre allotment Tempo data IRQ Control The attention point to cancel the power-down. 1 The time of 64xCLK_I is necessary before a digital part reverts to the normality after it is set up in DP=0. Be sure to do register access after you wait for this time. 2 The following are procedure that revert from the condition in analog whole power-down and analog power supply off. *AP1 is set to 0. VREF stands up at the time of maximum 50ms. Until VREF stands up, don't set "0" to AP2-AP4. *AP2 is set to 0. *AP3, AP4 are set to 0 after minimum 10s. *An analog part becomes possible it moves. AP4 is set to 1 when used only a speaker amplifier part(hands free phone) AP2,3 are set to 1 when a speaker amplifier isn't used and only head phone is used. And it is possible that electric current is further restrained. Analog power supply OFF mode Only while pronunciation stops, it is possible that an analog power supply is turned off. Turn off an analog power supply after AP1, AP2, AP3 and AP4 are set to 1. It has the possibility that pop noise occurs if it doesn't do so. -22- YMU757B The establishment example by the use case. Depending on how the function is used, bit settings can be combined as shown below. AP1 Power reduction of 1 AP2 1 AP3 1 AP4 1 Precaution Be sure to set all volumes to "MUTE" first, then set all bits to "1" entire analog section simultaneously. Used for ear phone output only Used for speaker only (hand-free phone) 0 0 0 1 0 1 1 0 Set the FM and speaker volumes to "MUTE". Set the HP and FM volumes to "MUTE". -23- YMU757B Resetting This LSI can be initialized by setting the /RST terminal to "L" or through the software as the CLR bit is provided for the $32h setting. The inside of the LSI is initialized by doing hardware resetting, and it becomes default condition. It is completely initialized by software resetting except for the timbre data register of Index10h - 2Fh. The FIFO data counter will be cleared and FIFO will be empty by initialize. It is necessary to input CLK_I during resetting. Make sure to input CLK_I for at least 100 clocks during resetting. After resetting is cancelled, wait for at least 64 clocks of CLK_I input and then start making an access to registers. Settings and procedure to generate melody Follow the steps as described below/ 1. Set the CLKSEL ($33h) according to the clock frequency inputted for CLK_I. 2. Cancel the power-down mode of the analog section. (Refer to "Resetting sequence of analog section".) 3. Set the timbre data ($10-2Fh), timbre allotment data ($30h), tempo data ($31h) and volumes ($35-37h) as desired. 4. Enter 32 musical score data ($00h) until FIFO is full. 5. Set the IRQ point value of $34h. (Default at the center of FIFO). 6. Set "1" for IRQE of $34h 7.Set "1" for the ST bit of $32h and start the melody. Setting of clock frequency The establishment of clock frequency supports two forms of 'preset mode' and 'programmable mode'. Preset mode: Select clock from 2.688 / 8.4 / 12.6 / 14.4 /19.2 / 19.68 / 19.8 / 27.82 MHz. Programmable mode: Set to optional frequency from 2.685MHz to 27.853MHz at 55.93kHz intervals. 1)Using preset mode The establishment of clock frequency can be done by establishing value in $33h with preset mode. In this case, set "000000000b" to $39h. If set value except for it, movement of LSI isn't guaranteed. When value isn't established in either of $33h and $39h(default condition), becomes the condition that 2.688MHz is set with preset mode. 2)Using programmable mode The establishment of clock frequency can be done by establishing value in $39h with programmable mode. In this case, set "000b" to $33h. If set value except for it, movement of LSI isn't guaranteed. The value can be set to $39h are "000000000b", from "000110000b" to "111110010b". If set value except for it, movement of LSI isn't guaranteed. -24- YMU757B Interrupt sequence An interrupt from LSI (/IRQ-"L") occurs when the data amount in FIFO is less than the set value. For example, supposing that 10h (16b) is set for the IRQ point of $34h, FIFO is full with the data before starting the melody as described above under "Settings and procedure to generate melody". Once the melody is started, the musical score data is processed and the data in FIFO reduces continuously. When the remaining data amount becomes 16 bytes or less, the /IRQ terminal becomes "L" and an interrupt signal is transmitted to the external microprocessor. When an interrupt signal is detected, set "0" for IRQE and enter the musical score data into FIFO before it becomes empty. As overwriting the data into the filled FIFO is prohibited, enter the data into FIFO by the amount not causing overwriting (16 data in this case). Flow chart Execute each register setting following the steps described under "Settings and procedure to generate melody". Start the melody. As the sounds are produced, the musical score data are processed in the LSI. Has the remaining data in FIFO reduced to the IR point specified by the $34h setting or less? No Yes Set the IRQ enable bit (IRQE) to "0" and enter the data into FIFO, observing the following precautions. Be sure to enter the data before FIFO becomes empty. Overwriting the data into the filled FIFO is prohibited. Do you want to stop the melody? No Yes Stop the melody. (ST=0) -25- YMU757B State transition description Shown below is a state transition diagram of the YMU757B. Digital PowerON Ready Analog PowerON Ready Power On Hardware Reset Power On Power Off Initialized Write Setup Data Analog PowerDown mode STOP FIFO Data Write STOP Digital PowerDown mode PLAY Standby START Play Sequence to turn on the power supply. Ideally, the digital side power supply should be turned on first to initialize the hardware, followed by turning on of the analog side power supply. If the analog power supply is turned on when the hardware has not been initialized, noises may be generated. -26- YMU757B Explains about each status Digital Power ON Ready It is the condition before starting a digital power supply. Hardware Reset The digital power supply has been turned on. Immediately after it has turned on, always enter the hardware resetting data. Analog Power ON Ready It is the condition before starting a analog power supply. Turn on the analog power supply after the digital section has been initialized. Analog Power Down mode It is the state that the consumption electric power of the analog part is minimum. After the analog power supply has been turned on, the entire analog section is in the power down state. In order to proceed to the next step Initialized state, use the procedure described on page 21. The power of the analog section has been reduced. The power consumption of the analog section can be reduced. Be sure to take the procedure to reduce the power of the analog section from the initialized state. (That is, each volume must be set to "MUITE".) It is possible to select the point where the power is reduced depending on the use purpose. For the details, refer to "Power-down sequence" on pages 20, 21 and 22. To turn off the analog power supply, always take the necessary procedure from this state. Initialized Becomes this state when it comes out of the power down mode of the analog part, the digital part. And, move to the power down mode from this state. STOP The volume muting function has been cancelled and the timbre data settings have been completed. In this state, FIFO is empty. This state is restored when the melody reproduction is stopped. Also, the procedure to reduce the power of the digital section can be taken from this state. This state will be restored when the power-down function is cancelled. PLAY Standby Writing the musical score data into FIFO has been completed and ready for melody reproduction. Setting "1" for the ST bit will set for the next PLAY mode. It is possible to take the procedure to reduce the power of the digital section from this state. However, the STOP state will be restored after the power-down function is cancelled. PLAY The melody is being reproduced. Setting "0" for the ST bit will set to the STOP mode. It is prohibited to change the digital section from this mode to the power down mode. (It may cause noises to occur.) Digital Power Down mode The power of the digital section has been reduced. ("1" set for DP bit) As clocks are not inputted inside of the LSI even when they are inputted to the CLK_I terminal, power consumption of the digital section can be reduced. Before proceeding to this mode, set both HP volume and FM volume to "MUTE". -27- YMU757B Operation in FIFO empty state If FIFO has become empty during reproduction, the musical score data written last is processed continuously until the next data is entered. If the last written data is a note data, that note is reproduced continuously. If the last written data is a rest data, the rest state will be maintained. Reproduction method assuming occurrence of empty state In the ordinary melody reproduction, it is prohibited to allow the FIFO empty state to occur. However, utilizing the above feature enables short sounds produced easily. The interrupt function would not be necessary. To have short sounds produced, follow the steps as described below. Short sounds are applicable to 1 to 32 word data block. If the data block exceeds 33 words, use the regular reproduction procedure utilizing the interrupt function. 1) Complete the procedure of Power ON --> Analog Power Down mode -- Initialized --> STOP in advance. (Please refer to "State transition description" diagram on page 25.) 2) Start reproduction in the FIFO empty state. 3) Write the data block to be reproduced into FIFO. 4) Immediately after writing (after 0 to 20us), the musical score data are processed internally and reproduction is started. As reproduction goes on, the data in FIFO are processed and cleared. 5) When FIFO becomes empty, if the last data in the data block is a note data, that note is reproduced continuously and if it is a rest data, the rest state is retained until the next data block is written into FIFO. 6) When reproducing the next data block, go to step 3). To stop reproduction, set "0" for ST. Then the data counter of FIFO will be cleared and the state as described in step 1) will be restored. -28- YMU757B Example of system connection Headphone HPOUT EQ1 C1 R1 SCLK SYNC SDIN SCLK SYNC SDIN EQ3 EQ2 R2 AIN C2 YMU757B RESET# IRQ# /RST /IRQ SPOUT1 SPOUT2 AVDD AVSS VREF SPVSS 0.1uF +3.0V 4.7uF CLK CLK_I DVDD DVSS +3.0V 4.7uF 0.1uF 0.1uF -29- YMU757B One sound and volume level adjustment in 4 sound pronunciation The volume level outputted from DAC by the number of the pronunciation is different. When 1 sound (*) is outputted from FM sound source, output voltage amplitude from DAC is 0.375Vp-p. When more than one sound is pronounced at the same time, output voltage amplitude varies in the phase of each wave shape. But, when the wave shape of the same phase piles up, it becomes 0.75Vp-p by 2 sound, 1.125Vp-p by 3 sound, 1.5Vp-p by 4 sound. (*: The volume adjustment (Total Level of Carrier) of 1 sound is being explained with the premise of 0dB.) HP VOL FM VOL HPOUT EQ1 R1 FM sound DAC VREF EQ2 + R2 EQ3 SP VOL BTL Driver +11.6dB SPOUT1 SPOUT2 RL=8 An assumption in 300m W output. Output power from the speaker is 300mW when RL is 8 and a voltage between SPOUT1 and 2 is 1.55Vrms. BTL output amplitude at this time becomes 1.55x2x1.414=4.38Vpp, and becomes 4.38/3.8=1.15Vpp with the EQ3 terminal. (Gain with the speaker amplifier is +11.6dB= 3.8 times.) Securing a volume level by one sound. Gain adjustment in the part EQ amplifier is recommended as the way of securing a volume level by one sound. Gain depends on the resistance ratio of R1 and R2, and it is GAIN=R2/R1. Gain to recommend is about four times from three times. -30- YMU757B A level adjustment recommendation example in all FM volume or either of SP Volumes is a little squeezed as a default (from -3dB to -6dB). When a user adjusts volume, it is considered controlling either FM or SP volume. At this time, because the side which gain is raised to is secured in advance, either of FM volume or SP Volumes is a little squeezed as a default. It is recommended making gain of the part EQ amplifier about 3 - 4 times to secure the output level for which to be one sound (For example, R1=22k, R2=82k). When one sound is pronounced under this condition(FM volume as 0dB), EQ1 is 0.375Vp-p. In this state, if set gain=four times in EQ amplifier, EQ3 becomes 1.5Vp-p. When it is set up in -4dB with SPVOL, voltage between SPOUT1 and 2 becomes 3.6Vp-p, and can be get output power 162mW with the speaker (RL=8). A level adjustment of four sound pronunciation simultaneously When usual music is regenerated, the amplitude of DAC never almost swings to 1.5Vp-p. Therefore, there is no hindrance by the setup of GAIN which is the same as 1 sound. Adjust it with FM, SP Volume if you restrain GAIN of the part EQ amplifier a little when you are anxious about the distortion of the sound. A level adjustment of HPOUT Adjust it outside the LSI when you raise gain on the HPOUT side. -31- YMU757B Sound quality correction circuit It is possible to correct the sound quality and gain by using an external circuit connected to EQ1 to 3 terminals. A circuit structure of EQ1 to 3 terminal inside and example of external circuit are as follows. C3 AIN C1 R1 R2 EQ1 FM VOL EQ2 EQ3 Rx C2 + VREF Gain and filter characteristic are adjusted by value of C1, C2, R1 and R2. Gain = R2 / R1. Recommendation of R1 is 22k and R2 is 82k (gain = 3.7 times). Cut off frequency f1 and f2 of filter is as follows. f1=1/ (2xR1xC1). f2=1/ (2xR2xC2). Recommendation of each value are as follows. If C1=0.022F and C2=120pF, cut off frequency f1=330Hz and f2=16kHz. Gain Gain1 Gain1 -3dB f1 f2 Freq Moreover, the circuit enclosed with the dotted line becomes necessary when an analog signal is inputted from AIN and it wants to mix it. The level adjustment that it is mixed depends on the resistance ratio R2/Rx of Rx and R2. The value of Rx when it wants to mix it in the amplitude of one time of AIN is 82k. -32- YMU757B If add resister R3, frequency characteristic is as follows. C2 C1 R1 R2 EQ2 EQ3 R3 EQ1 FM VOL + VREF Gain1= (R2+R3) /R1. Gain2=R3/R1. Cut off frequency f1 and f2 of filter is as follows. f1=1/ (2xR1xC1). f2=1/ (2xR2xC2). Gain Gain1 Gain1-3dB Gain2 f1 f2 Freq -33- YMU757B Serial I/F Specifications 8 clk 16 clk SCLK SYNC Type1 SYNC Type2 MSB LSB 10 MSB 15 Control Data (16bit) LSB 10 MSB 76 SDIN 76 Index Data (8bit) The YMU757B is controlled through the three serial interfaces SCLK, SYNC and SDIN. About the relations between SDIN and SCLK The value of SDIN is taken in the inside of the LSI at the SCLK rise. Input SDIN so that setup/Hold time is secured to rise edge of SCLK. (Refer to the AC characteristics of the electric characteristics for the details of the timing specification.) About SDIN The figure above shows no data transmission between Index data and Control data but it means nothing problematic. 24 bit continuous data transmission is also possible. When transmitting the data by 8-bit unit, transmit the upper 8 bits and lower 8 bits of the control data separately. There is no particular specification for the interval between the end of transmission of the upper 8 bits and start of transmission of the lower 8 bits. However, the longer the interval is, the longer time one transmission takes. When entering the musical score data into FIFO, use care not to make FIFO empty. About SYNC It can correspond to Type1 and Type2 of the upper figure. When rise edge of SYNC occurs inside the LSI, it considers that the data transfer of one time was completed. SDIN for 24xSCLK just before rise edge of SYNC occurs is judged valid data. (SDIN for 16xSCLK are valid data when transfer only Control Data.) There is no regulation specially about the length of the H period. But, L period is to make 100ns be secured at least in the case of the Type2 wave shape It has the possibility that faulty operation is caused when rise edge of SYNC and fall edge of SCLK approach it. Give careful consideration to rise edge of SCLK doesn't occur toward rise edge of SYNC. About the data transfer only Control Data. If input SDIN for SCLKx16 between rise edge of SYNC and next rise edge of SYNC, the inside of the LSI is judged it is music data ($00h) and take it. -34- YMU757B Electrical characteristics 1. Absolute maximum ratings Parameter Power supply voltage (analog) Power supply voltage (digital) Analog input voltage Digital input voltage Operating temperature Storage temperature Note) DVSS = AVSS= SPVSS = 0V 2. Recommended operating conditions Parameter Operating voltage (analog) Operating voltage (digital) Symbol AVDD DVDD VINA VIND TOP TSTG Min. -0.3 -0.3 -0.3 -0.3 -20 -50 Max. 4.2 4.2 AVDD+0.3 DVDD+0.3 85 125 Unit V V V V C C Symbol AVDD DVDD TOP Min. 2.7 2.7 -20 Typ. 3.0 3.0 25 Max. 3.3 3.3 85 Unit V V C Operating temperature Note) DVSS = AVSS = SPVSS = 0V 3. DC characteristics Parameter High-level input voltage Low-level input voltage High-level output voltage Symbol VIH1 VIL1 VOH VOL Vsh IL CI Condition *1 *1 IOUT = -1mA IOUT = 1mA Min. 0.7 x DVDD 0.8 x DVDD -10 Typ. 1.0 Max. 0.2 x DVDD 0.4 10 10 Unit V V V V V A Low-level output voltage Schmitt width Input leakage current Input capacity pF Note) TOP=-20~85C, DVDD=3.00.3V, Capacitor load=50pF -35- YMU757B 4. AC characteristics Input ViH=0.8xVdd, ViL=0.1xVdd as input signal. Measure timing at ViH=0.7xVdd, ViL=0.2xVdd. 4-1. CLK_I ,Reset Parameter CLK_I clock cycle period CLK_I "L" pulse width CLK_I "H" pulse width /RST active "L" pulse width SCLK start delay time (after /RST inactive) Symbol Tcclk_period Tcclk_low Tcclk_high Trst_low Trst2clk Min. 35.8 12 12 100 64 Typ. Max. Unit ns ns ns x CLK_I x CLK_I Note) TOP=-20~85C, DVDD=3.00.3V, Capacitor load=50pF X CLK_I means the number of clocks inputted through the CLK_I terminal. CLK_I Duty Tcclk_high 0.8xVdd 0.7xVdd 0.2xVdd 0.1xVdd Tcclk_period Tcclk_low CLK_I Hardware Reset Trst_low Trst2clk VIL /RST SCLK -36- YMU757B 4-2. Serial Interface Parameter SCLK clock period SCLK "L" pulse width SCLK "H" pulse width SCLK rise time SCLK fall time SYNC "H" pulse width SYNC rise time SYNC fall time SYNC delay time SYNC "L" pulse width SYNC > SDIN setup time SDIN setup time SDIN hold time SDIN rise time SDIN fall time Symbol Tsclk_period Tsclk_low Tsclk_high Trise_sclk Tfall_sclk Tsync_high Trise_sync Tfall_sync Tdelay_SYNC SYNC_low Tsetup_SYNC Tsetup_SDIN Thold_SDIN Trise_din Tfall_din Min. 430 200 200 100 0 100 50 50 50 - Typ. Max. - Unit ns ns ns - 20 20 20 20 20 20 ns ns ns ns ns ns ns ns ns ns ns ns Note) TOP=-20~85C, DVDD=3.00.3V, Capacitor load=50pF Tsclk_high Tfall_sclk SCLK Trise_sclk Tsclk_period Tsclk_low Tsync_high SYNC Trise_sync Tfall_sync SDIN Trise_din Tfall_din SCLK Tsetup_SDIN Thold_SDIN Tsetup_SYNC SDIN Tdelay_SYNC SYNC SYNC_low -37- YMU757B 5. Power consumption Parameter During normal operation (digital) During no output sound(analog) Output 300mW (analog) (RL=8) Min. Typ. 500 9 200 0.1 Max. 2000 12 300 1 Unit A mA mA A In power-down mode Note) TOP=-20~85C, DVDD= AVDD = 3.00.3V, Capacitor load=50pF 6. Analog characteristics SP Amplifier Parameter Min. Typ. 1.9 8 5.0 360 400 0.025 -90 65 Max. Unit times Vp-p mW mW % dBv dB Gain setting (fixed) Minimum resister load (RL) Full-scale analog output(RL=8) Maximum output power (RL=8,THD+N<=0.05%) Maximum output power (RL=8,THD+N<=1.0%) THD + N PSRR (RL=8,f=1kHz,300mW output) Noise level(no signal, f= 400Hz - 20kHz) (f=1kHz) Note) TOP=25C, DVDD = AVDD = 3.0V EQ Amplifier Parameter Min Typ Max. 30 Unit dB A Gain setting range Maximum output current Full-scale analog output THD + N (f=1kHz) -90 10 36 120 1.5 Vp-p 0.01 % dBv M dB Noise level (no signal, f= 400Hz - 20kHz) Input impedance PSRR (f=1kHz) Note) TOP=25C, DVDD = AVDD = 3.0V SP Volume Parameter Min -30 Typ Max 0 Unit dB dB dBv Volume setting range Volume step width Noise level (no signal, f= 400Hz - 20kHz) THD + N (f=1kHz) Note) TOP=25C, DVDD = AVDD = 3.0V 1 -90 0.01 % -38- YMU757B FM Volume Parameter Min -30 1 -90 120 1.5 300 36 600 Typ Max 0 Unit dB dB dBv A Volume setting range Volume step width Noise level (no signal, f= 400Hz - 20kHz) Maximum output current Full-scale analog output Output impedance PSRR (f=1kHz) Note) TOP=25C, DVDD = AVDD = 3.0V HP Volume Parameter Vp-p dB Min -30 Typ Max 0 Unit dB dB dBv A Volume setting range Volume step width Noise level (no signal, f= 400Hz - 20kHz) Maximum output current Full-scale analog output Output impedance PSRR (f=1kHz) Note) TOP=25C, DVDD = AVDD = 3.0V VREF Parameter 1 -90 120 1.5 300 36 600 Vp-p dB Min 1.4 Typ 1.5 Max 1.6 Unit V VREF voltage Note) TOP=25C, DVDD = AVDD = 3.0V DAC Parameter Min Typ Max Unit Resolution Full-scale analog output (*) THD+N (f= 1kHz) Noise level (no signal, f=400Hz - 20kHz) Frequency characteristic (f=50Hz - 20kHz) Note) TOP=25C, DVDD = AVDD = 3.0V 12 1.5 0.5 -90 -0.5 +0.5 Bit Vp-p % dBv dB * When it was made to pronounce FM 4 sound at the same time in the same phase. -39- YMU757B Speaker amplifire THD+N vs Output power AVDD=3.0V RL = 8 f=1kHz 10.0000 THD+N (%) 1.0000 0.1000 0.0100 0 100 200 300 400 500 Output power (mW) Speaker amplifire Frequency characteristics vs PSRR 0.00 -10.00 -20.00 -30.00 AVDD=3.0V RL = 8 PSRR (dB) -40.00 -50.00 -60.00 -70.00 -80.00 10 100 1000 10000 100000 Frequency (Hz) -40- YMU757B General description of FM sound generator "FM" stands for Frequency Modulation. The FM sound generator utilizes the higher harmonic wave produced by the frequency modulation for synthesis of the musical sounds As use of this FM system enables a comparatively simple circuit to produce such waveform that has a harmonic wave including disharmonious sounds, it is possible to create a wide range of sounds from the synthesized sounds of the natural musical instruments to the electronic sounds. The diagram below shows the most basic configuration of the FM system. Sin Wave Table Sin Wave Table f A m Phase Generator Envelope Generator I c c Phase Generator Envelope Generator Operator 1 : Modulator Operator 2 : Carrier The "Operator" refers to the section where a sine wave is generated and the combination of the operators is called "algorithm". The operator in the front stage is called "modulator" and that in the rear stage "carrier". Each operator is capable of setting the frequency and the envelope waveform. The configuration in the above diagram can be expressed in the formula as follows. FM(t) = A sin(w ct + B sin w mt ) A : Amplitude of the carrier. B : Amplitude of the modulator. w : Angle frequency of the carrier wm : Angle frequency of the modulator In addition, a system called "feedback FM" is available to create a wider range of sounds. In this system, the frequency modulation is fed back as shown in the diagram in the following page. B is called "feed-back ratio". Using the feed-back FM function, it is possible to produce the strings type sounds. -41- YMU757B External dimensions -42- YMU757B IMPORTANT NOTICE 1. Yamaha reserves the right to make changes to its Products and to this document without notice. The information contained in this document has been carefully checked and is believed to be reliable. However, Yamaha assumes no responsibilities for inaccuracies and makes no commitment to update or to keep current the information contained in this document. 2. These Yamaha Products are designed only for commercial and normal industrial applications, and are not suitable for other uses, such as medical life support equipment, nuclear facilities, critical care equipment or any other application the failure of which could lead to death, personal injury or environmental or property damage. Use of the Products in any such application is at the customer's sole risk and expense. 3. YAMAHA ASSUMES NO LIABILITY FOR INCIDENTAL, CONSEQUENTIAL OR SPECIAL DAMAGES OR INJURY THAT MAY RESULT FROM MISAPPLICATION OR IMPROPER USE OR OPERATION OF THE PRODUCTS. 4. YAMAHA MAKES NO WARRANTY OR REPRESENTATION THAT THE PRODUCTS ARE SUBJECT TO INTELLECTUAL PROPERTY LICENSE FROM YAMAHA OR ANYTHIRD PARTY, AND YAMAHA MAKES NO WARRANTY OR REPRESENTATION OF NON-INFRINGEMENT WITH RESPECT TO THE PRODUCTS. YAMAHA SPECIFICALLY EXCLUDES ANY LIABILITY TO THE CUSTOMER OR ANY THIRD PARTY ARISING FROM OR RELATED TO THE PRODUCTS' INFRINGEMENT OF ANY THIRD PARTY'S INTELLECTUAL PROPERTY RIGHTS, INCLUDING THE PATENT, COPYRIGHT, TRADEMARK OR TRADE SECRET RIGHTS OF ANY THIRD PARTY. 5. EXAMPLES OF USE DESCRIBED HEREIN ARE MERELY TO INDICATE THE CHARACTERISTICS AND PERFORMANCE OF YAMAHA PRODUCTS. YAMAHA ASSUMES NO RESPONSIBILITY FOR ANY INTELLECTUAL PROPERTY CLAIMS OR OTHER PROBLEMS THAT MAY RESULT FROM APPLICATIONS BASED ON THE EXAMPLES DESCRIBED HEREIN. YAMAHA MAKES NO WARRANTY WITH RESPECT TO THE PRODUCTS, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR USE AND TITLE. Note) The specifications of this product are subject to change without notice. Agency Address inquiries to: Semiconductor Sales & Marketing Department Head Office 203, Matsunokijima, Toyooka-mura, Iwata-gun, Shizuoka-ken, 438-0192 Tel. +81-539-62-4918 Fax. +81-539-62-5054 Tokyo Office 2-17-11, Takanawa, Minato-ku, Tokyo, 108-8568 Tel. +81-3-5488-5431 Fax. +81-3-5488-5088 Osaka Office Nanba Tsuzimoto Nissei Bldg. 4F 1-13-17, Nanbanaka, Naniwa-ku, Osaka City, Osaka, 556-0011 Tel. +81-6-6633-3690 Fax. +81-6-6633-3691 -43- |
Price & Availability of YMU757B
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |